FETHPC Results

In 2014, the European Commission funded 19 projects developing HPC technologies. These projects (called 'FET HPC 2014 projects') have produced a wealth of diverse results which constitute an important asset for the European HPC ecosystem. The EXDCI-2 project has compiled these outputs and organised them into the searchable database below. In case you search for a particular project, feel free to add the search function on the top right of this website. We hope it will allow these results to be reused, leading to synergies and collaborations between European (and overseas) players.

If you are interested in any of the results, please contact us indicating the output you are interested in and your motivation.

Interconnect developed in RTL and implemented in FPGA Provide efficient communication inside multi-FPGA infrastructure providing quality of service requirements
Domain: Hardware
Subtype: Interconnect
Targeted users: HPC system provider, Integration project
Many core accelerators developed RTL and implemented in FPGA (one rather generic PEAK; one NU+ is more a GPU like accelerator; TETRAPOD for tailored FPGA resources)
Domain: Hardware
Subtype: Computing node or element
Targeted users: HPC system provider, Integration project
Product designed by PRO DESIGN (partner of ETP4HPC). FPGA system that is customized for HPC systems. The system has pluggable FPGA modules, memory modules, I/O boards, processor board and interconnections
Domain: Hardware
Subtype: HPC System
Targeted users: HPC system provider, Integration project
Training to MERO and CLOVIS
Domain: Training
Targeted users: Application developer

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